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8.Verilog: Basic Adder

4/10/2024

Verilog, as I'd like to eventually work on making CPUs, digital systems, circuits, and the such, it is a necessary tool to have to reach my goal. And so we'll be working with it here!

But what is Verilog?

Verilog is one of the most popular Hardware Description Languages (HDLs) used for designing and modeling digital systems. It allows engineers to describe complex digital logic circuits and simulate their behavior before physical implementation. And so it allows for greater efficient use of materials, greater accessiblity to those learning, and lesser waste on prototypes and tries that might turn sour!

Verilog can simulate anything from high-level algorithms to low-level gate and switch-level modeling. It was developed in 1984 by Gateway Design Automation and later became an IEEE standard (IEEE 1364).

Features of Verilog

Modules

In Verilog, the fundamental building block is the module. A module can represent anything from a simple logic gate to an entire system. Here's an example of a simple module: 
module and_gate (
    input wire a,  // Input a
    input wire b,  // Input b
    output wire y  // Output y
);
    assign y = a & b;  // AND operation
endmodule
In this example, and_gate is a module with two inputs (a and b) and one output (y). The assign statement describes the logic operation.

operators

Verilog supports a wide range of operators for arithmetic, logical, relational, and bitwise operations. For example:

Writing a Basic Adder in Verilog

Now, let's dive into writing a basic adder in Verilog. We'll create a simple 1-bit full adder, which is a fundamental digital circuit that adds two binary numbers along with a carry input and produces a sum and a carry output.

The logic for a full adder can be described as follows: 
module full_adder(
    input wire a,      // First input bit
    input wire b,      // Second input bit
    input wire cin,    // Carry input
    output wire sum,   // Sum output
    output wire cout   // Carry output
);
    // Sum is the XOR of the three input bits
    assign sum = a ^ b ^ cin;

    // Carry out is obtained by ORing the ANDs of the input pairs
    assign cout = (a & b) | (b & cin) | (cin & a);
endmodule

Explanation of the Full Adder Code

Module Declaration:

Sum Calculation:

Carry Calculation:

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